1. Cross Reference to Related Applications
This application is related to the co-pending application of Derryl D. J. Allman, William J. Crosby and James A. Maiolo entitled "Polishing Composition For CMP Operations", filed concurrently herewith.
2. Technical Field
The present invention relates generally to compositions and methods used for polishing and planarizing the surfaces of various workpieces and, more specifically, to compositions and methods used for planarizing workpieces by chemical mechanical polishing of dielectric layers formed over components in the manufacture of semiconductor devices.
3. Description of the Related Art
Compositions useful for polishing the surfaces of various workpieces are well known in the art. Conventional polishing compositions, which are used for polishing the surfaces of semiconductors, glass, crystal, metal and ceramic workpieces, generally comprise aqueous slurries of an appropriate abrasive agent or particle or mixtures of such particles. Commonly utilized abrasive agents include cerium oxide, aluminum oxide, zirconium oxide, tin oxide, silicon dioxide, titanium oxide, etc. Polishing compositions utilizing such agents are generally used by first applying the composition to a polishing pad or to the surface to be polished. The polishing pad is then applied to the surface, which causes the abrasive particles contained within the composition to mechanically abrade the surface, thus effecting the polishing action. However, such conventional polishing compositions used in the general polishing arts cannot produce the highly specular and planar surfaces required in semiconductor and microelectronic component technology. Moreover, conventional polishing compositions have demonstrated disadvantages, such as poor polishing rates and poor surface quality, in polishing other workpieces. For example, the surfaces of glass, metals and semiconductors polished with such compositions demonstrate various defects such as haze, stains, scratches, undulations, undercuts, mesas, etc.
Attempts have been made in the prior art to improve the existing, commercially useful polishing compositions. Two methods of attaining improvement in these areas include (1) the combination of various abrasives; and (2) adding various adjuvants to the compositions.
Examples of combinations of abrasive particles include combinations of, e.g., cerium oxide and a rare earth pyrosilicate. Examples of the use of adjuvants in polishing compositions include the use of salts such as potassium chloride or ammonium chloride or combinations of such salts to promote the polishing effectiveness of the metal surface by the abrasive agent. However, even the addition of abrasive agents or the addition of adjuvant materials, have failed to produce completely satisfactory polishing compositions capable of producing the planarized surfaces needed in modern semiconductor and microelectronics technology.
Modern semiconductors are typically produced by slicing a silicon or germanium crystal ingot, forming a "wafer." The surface of these wafers is polished to form a flat surface having as little roughness as possible. It is advantageous to provide a flat or planarized surface for the purpose of avoiding problems, such as non-uniform resist exposure, as well as for many other reasons. Planarization is commonly achieved by providing a planarizing layer over a topographical surface which is a dielectric substance. The dielectric substance may be, for example, a spin-on-glass. Such planarizing layers generally provide a high degree of planarization for periodic features which are approximately 10 microns or smaller. However, such planarizing layers provide relatively poor planarization for underlying features having a larger periodicity. Rather, the upper surface of the planarizing layer tends to reflect the topography of the underlying structures. Consequently, polishing techniques, ordinarily using a rotating soft pad and a fluid or slurry between the pad and the surface, are employed to obtain long range planarization where the underlying features are spatially large.
Preparation of semiconductors and other microelectronic components generally involves building many interconnected layers of components upon a wafer substrate. Thus, compositions useful for polishing or planarizing semiconductors must be able to polish complex composite surfaces which are comprised of multiple layers of interconnected high density integrated circuits both at and below the surface. In preparing semiconductors, the structure resulting from the interconnected layers of integrated circuitry is polished down to a predetermined planar level which may comprise components of varying size, shape and hardness, as well as trenches, holes and valleys of various depth and shapes. After such polishing, semiconductor preparation may continue by various other procedures, such as chemical vapor deposition, metalization via vapor deposition, photolithographic patterning, diffusion, etching, etc., as will be recognized by those skilled in the art.
To provide superior results, special chemical mechanical polish (CMP) compositions are used to polish or planarize the surfaces of prepared semiconductor workpieces. However, unlike conventional polishing to provide a planar surface, the polishing action must be restricted to the level surface of the workpiece and must not affect the topography, morphology and/or structures below the surface. Only such selective polishing action will produce the desired planar surface. Conventional polishing compositions are not well suited for such procedures as they merely produce uneven, undulating surfaces by abrading certain regions on, below and within the surface of the workpiece. It has proven difficult to use conventional polishing products to obtain smooth defect-free surfaces wherein the polishing composition does not adversely affect the underlying structure of the workpiece.
Even where specially designed CMP compositions are applied as an aqueous slurry to the workpiece, other shortcomings exits such as a high consumption rate of slurry, as well as shortcomings in the delivery of slurry to the center of the semiconductor wafer, via the polishing pad, while polishing the surface of the wafer flat. The polishing pad used also deforms to the surface of the wafer, preventing 100% perfect planarization from being achieved. Another problem with the prior art processes is that the CMP operation upon an oxide has no end point capability and therefore is dependent upon knowing and controlling the removal rate such that the operation can be timed to control the degree of planarization.
Accordingly, it can be seen that a long felt need exists for polishing compositions which provide improved polishing activity at improved rates and which will produce planar and defect-free surfaces as well as methods for the use of such compositions.